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Task1: Waveform Diagrams
Consider the circuit of Flip-Flops (FF) shown here.
Assume that input X alternates between 1 and 0, 10ns after every rising edge. Initially, X is 0 (so 10ns after the first rising edge it should be 1) while A, B, C, and D are unknown.
Assume one clock cycle is 30 ns. Given the clock signal, draw the wave for input X, and the signals at points A, B, C, and D in the circuit for the first 6 clock cycles.
Assume that the clk-to-q delay is 5 ns, the setup time is negligible (~0 ns), and the hold time is 5ns. Assume that Flip-Flops take their new value on the rising edge of the clock cycle.
Assume time = 0 on the first rising edge. Note the NOT gate that precedes B (you may ignore propagation delay for this problem).
You should fill out the waveform diagram below to help you answer the following questions. However, you only have to submit the answers to the questions, not the whole diagram.
Consider six clock cycles (so six rising edges) as shown in the diagram. Assume the diagram is cut off 5ns after the last rising edge.
You only need to consider from t = 0 ns to t = 155 ns for this problem.
How many times does the value at B change (changing from undetermined to 1 or 0 counts as one)?
How many times does the value at D change (changing from undetermined to 1 or 0 counts as one)?
At which time(s) does the value at A becomes stable at 0?
At which time(s) does the value at C becomes stable at 1?
Task2: Simple FSM and Truth Tables
Please design a simple FSM. Input and output are both one bit. Output 1 twice if it sees two consecutive 1's. In other words, given some input Xi, if Xi-2 =
Xi-1 = 1 or Xi-1 = Xi = 1, then it will output 1. Then convert it into a truth table mapping each state and input to a next state and an output. Name the states
meaningfully so that it is easily understandable (for example, Seen1 and Seen11). You should have eight states. You need to submit the truth table and your drawing of the FSM.
Task3: Truth Tables, Boolean Algebra, FSMs
Consider the following finite state machine.
Come up with the MOST simplified boolean expressions for determining bits for the next state and the output bit given the current state and the input bit. You should have 3 expressions,
one for each digit of the next state as well as one for output. (You might want to first construct a truth table.).
Please label the left bits as Curr_1 and Next_1 for start state and next state left bits, respectively, and do the same for right bits Curr_0 and Next_0.
fsmCompute takes one bit at a time as input. Fill in the blanks below so that it behaves as according to the FSM above. Hint: your expressions from part a should come in handy, along with some bitwise operators. Also, note how the state is a static variable, so it is maintained across function calls.
/*
Called once per "clock cycle."
Assume input x is 0 or 1.
Updates state and outputs FSM output (0 or 1).
*/
int fsmCompute(int x) {
int retval;
static unsigned int state = 0x1;
retval = ______________________;
state = _______________________;
return retval;
}
Task4: Some More Boolean Algebra
Write a formula in Boolean algebra to define the logical function that takes as input 32 bits x0,...,x31, and evalutes to 1 if and only those bits correspond to an I-type instruction. Assume that x0 is the most significant bit of the instruction. Note that this is a different convention from the one on the Green Card. Your formula need not involve all the input bits. (Hint: It might be easier to start off by figuring out what instructions aren't I-types, and then go from there)
