Computer Architecture

Spring 2017

School of Information Science and Technology SIST
SchanghaiTech University

LectureTuesday, 10:15-11:55. 教学中心 (Teaching Center) 203
LectureThursday, 10:15-11:55. 教学中心 (Teaching Center) 203
DiscussionsThursday, 19:45 SIST 1A-200
Lab 1Tuesday, 13:00-14:40. SIST 1D-106; TA: Jianzhong Liu
Lab 2Tuesday, 15:00-16:40. SIST 1D-106; TA: Yunchen Yang
Lab 3Thursday, 13:00-14:40. SIST 1D-106 TA: Bin Chen
Lab 4Thursday, 15:00-16:40. SIST 1D-106 TA: Yonghao Liu
Lab 5Friday, 13:00-14:40. SIST 1D-106 TA: Feiran Jia
HomeworkSubmit your homework to the gradebot.
ForumPost all your questions on the forum.
Slip days and registration   list
Schedule
Week Date Topic Reading Discussion Homework Lab Project
102-14 Introduction P&H: 2.4 HW 1 Due Wed, March 1st, 23:59:59 No Lab
02-16 Introduction to C I K&R Ch. 1-5
202-21 Introduction to C II K&R Ch. 6-7 Lab 1
02-23 Introduction to C III
302-28 Intro to Assembly Language, MIPS Intro P&H: 2.1 - 2.3 Discussion 3 HW 2 Due Wed, March 8th, 23:59:59 Lab 2
03-02 MIPS, MIPS Functions P&H: 2.6 - 2.9, 2.10, A.6
403-07 MIPS Instruction Formats P&H: 2.5, 2.10 Discussion 4 Lab 3
03-09 Compiler, Assembler, Linker, Loader (CALL) P&H: 2.12, A.1-A.4
503-14 Intro to Synchronous Digital Systems (SDS), Logic P&H: B.2-B.3 Discussion 5 HW 3 Due Fri, March 17th, 23:59:59 Lab 4 Project 1.1
Due Friday, March 24, 23:59:59
03-16 Functional Units, FSMs P&H: 4.2, B.3-B.6
603-21 MIPS Datapath, Single-Cycle Control Intro P&H: 4.1, 4.3, 4.4 Discussion 6 HW 4 Due Wed, March 29th, 23:59:59
results
Lab 5
03-23 MIPS Single-Cycle Control P&H: 4.5-4.8
703-28 MIPS Pipelining P&H: 4.10, 4.11 Discussion 7 Lab 6 Project 1.2
Due Friday, April 7, 23:59:59
03-30 Review for Midterm I
804-04 Holiday no lab
04-06 Memory Hierarchy, Caches P&H: 5.1 5.2 5.3
904-11 Mid-Term I HW 5 Due Wed, April 19th, 23:59:59
solution
Project 1 checkup Mid-Term I solution
04-13 Caches: Direct-mapped, Set-associative P&H: 5.4
1004-18 Multilevel Caches P&H: 5.8 1.6 Discussion 10 Lab 7 Project 2.1
Due Wedenesday, May 3, 23:59:59
04-20 Performance and Floating Point Operations P&H: 3.5 3.9
1104-25 Flynn Taxonomy, Data-Level Parallelism P&H: 1.7, 1.8, 6.1, 6.2, 6.3, 6.7 Discussion 11 HW 6 Due Fri, May 5th, 23:59:59 Project 1 checkup
04-27 Review for Mid-Term II
1205-02 Thread-Level Parallelism, OpenMP Intro P&H: 6.5, 5.10, 2.11 Discussion 12 Lab 8 Project 2.2
Due Saturday, May 13, 23:59:59
05-04 Cache Coherence, OpenMP Sharing Issues, Performance P&H: 5.10
1305-09 Mid-Term II Discussion 13 Lab 9 Mid-term II
corrected
solution
05-11 Warehouse Scale Computing, MapReduce (Spark) The Datacenter as a Computer: Ch 1, Ch 2.4, Ch 3, 5.1-5.3
1405-16 OS Support, Base and Bounds, Interrupts, Virtual Memory Intro P&H: 5.13, 5.15, 5.16 Lab 10
05-18 More Virtual Memory P&H: 6.9 (only p.4-10), 4.9
1505-23 I/O: DMA, Disks, Networking P&H: 5.2, 5.5, 5.11 HW 7 Due Sunday, June 21, 23:59:59 Lab 11 & Project 2 checkup Project 3
Due Monday, June 21, 23:59:59
05-25 Dependability: Parity, ECC, RAID P&H: 5.5, B-65 to B-67
1605-30 Holiday No Lab
06-01 Summary Lecture by TA
17 6-15 Final: Thursday, June 15, 9-11
Teaching Center 201 & 202
Final
Final solution
Instructor
Sören Schwertfeger
Sören Schwertfeger 师泽仁
<soerensch>
OH: You are always welcome! Wednesday 13:00-15:00; Room: 1D 201A

TAs
Please check the TA office hours on piazza.
Xu Qingwen
Qingwen Xu 徐晴雯
<xuqw>
Head TA
Bin Chen
Bin Chen 陈彬
<chenbin>
Yonhao Liu
Yonghao Liu 刘永豪
<liuyh1>
Xin Qin
Xin Qin 覃昕
<qinxin>
Feiran Jia
Feiran Jia 贾斐然
<jiafr>
Jianzhong Liu
Jianzhong Liu 刘健中
<liujzh>
Yunchen Yang
Yunchen Yang 杨贇晨
<yangych>

Syllabus

Check the syllabus for the CA course on the SIST website.

Textbook

P&H
Patterson, David A. and Hennessy, John L. Computer Organization and Design 5th edition. Morgan Kaufmann.

References

K&R
Kernighan, Brian W. and Ritchie, Dennis M. The C Programming Language (2rd ed.). Prentice Hall.

Requirements

Reading
Read the chapters before class. I will not read the textbook to you during class. Rather, I will help you better understand certain materials in the textbook.
Class participation
Participate actively in the discussions both in class and on the forum.
Communication
Read your email and the forum at least once in any 12 hour period (including weekends and holidays), as I may post important announcements.

Grading

The Engineering Design course consists of projects done in parallel to the Computer Architecture course. The projects thus contribute 33% to your overall score.

Resources

Feedback

We always welcome any feedback on what we could do better. You are also welcome to send us feedback anonymously if you like.