Project 1-1: RISC-V Assembler

Computer Architecture I ShanghaiTech University
Project 1.1


The projects are part of your design project worth 2 credit points. As such they run in parallel to the actual course. So be aware that the due date for project and homework might be very close to each other! Start early and do not procrastinate.

So What Is This About?

In this part of the project, we will be writing an assembler that translates a subset of the RISC-V instruction set to machine code. Our assembler is a two-pass assembler similar to the one described in lecture. However, we will only assemble the .text segment. At a high level, the functionality of our assembler can be divided as follows:

Pass 1: Reads the input (.s) file. Comments are stripped, pseudoinstructions are expanded, and the address of each label is recorded into the symbol table. Input validation of the labels and pseudoinstructions is performed here. The output is written to an intermediate (.int) file .

Pass 2: Reads the intermediate file and translates each instruction to machine code. Instruction syntax and arguments are validated at this step. The instructions and symbol table are written to an object (.out) file.

The Instruction Set

Please consult the RISC-V Green Sheet for register numbers, instruction opcodes, and bitwise formats. Our asembler will support all 32 registers: x0, ra, sp, gp, tp t0-t6, s0 - s11, a0 - a7. The name x0 can be used in lieu of zero. Other register numbers (eg. x1, x2, etc.) are not supported.

We will have 18 instructions 5 pseudoinstructions to assemble. The instructions are:

Instruction Format
Add add rd, rs1, rs2
Or or rd, rs1, rs2
Set Less Than slt rd, rs1, rs2
Set Less Than Unsigned sltu rd, rs1, rs2
Shift Left Logical sll rd, rs1, rs2
Add Immediate addi rd, rs1, immediate
Or Immediate ori rd, rs1, immediate
Load Upper Immediate lui rd, immediate
Load Byte lb rd, offset(rs1)
Load Byte Unsigned lbu rd, offset(rs1)
Load Word lw rd, offset(rs1)
Store Byte sb rs2, offset(rs1)
Store Word sw rs2, offset(rs1)
Branch on Equal beq rs1, rs2, label
Branch on Not Equal bne rs1, rs2, label
Branch on Less Than blt rs1, rs2, label
Branch on Greater or Equal bge rs1, rs2, label
Jump and Link jal label

The pseudoinstructions are:

Pseudoinstruction Format
Load Immediate li rd, immediate
Branch on Equal to Zero beqz rs1, label
move mv rd, rs1
Jump j label
Jump Register jr rs1

Hint: You may need to implement jalr before jr.

Implementation Steps

Step 0: Obtaining the Files

Download framework first. You can compile you code by typing make. At first, you will get a bunch of -Wunused-variable and -Wunused-function warnings. The warnings tell you that variables/functions were declared, but were not used in your code. Don't worry, as you complete the assigment the warnings will go away.

Step 1: Building Blocks

Finish the implementation of translate_reg() and translate_num() in src/translation_utils.c. translate_reg() is incomplete, so you need to fill in the rest of the register translations. You can find register numbers on the RISC-V Green Sheet. Unfortunately, there are no built-in switch statements for strings in C, so an if-else ladder is the way to compare multiple strings.

For translate_num(), you should use the library function strtol() (see documentation here). translate_num() should translate a numerical string (either decimal or hexadecimal) into a signed number, and then check to make sure that the result is within the bounds specified. If the string is invalid or outside of the bounds, return -1.

Step 2: SymbolTable

Implement a data structure to store symbol name-to-address mappings in src/tables.c. Multiple SymbolTables may be created at the same time, and each must resize to fit an arbitrary number of entries (so you should use dynamic memory allocation). You may design the data structure in any way you like, as long as you do not change the function definitions. A SymbolTable struct has been defined in src/tables.h, and you may use the existing implementation or create your own if that feels more intuitive. Feel free to declare additional helper methods. See src/tables.c for details.

In add_to_table, you cannot simply store the character pointer that was given, as it could point to a temporary array. You must store a copy of that string instead. You should use the helper functions defined in src/tables.c whenever appropriate.

You must make sure to free all memory that you allocate. See the Valgrind section under testing for more information.

Step 3: Instruction Translation

Implement translate_inst() in src/translate.c. The RISC-V Green Sheet will again be helpful, and so will bitwise operations.

translate_inst() should translate instructions to hexadecimal. Note that the function is incomplete. You must first fix the funct fields, and then implement the rest of the function.You will find the translate_reg(), translate_num(), and write_inst_hex() functions, all defined in translate_utils.h helpful in this step. Some instructions may also require the symbol, which is give to you by the symtbl pointer. This step may require writing a lot of code, but the code should be similar in nature, and therefore not difficult. The more important issue is input validation -- you must make sure that all arguments given are valid. If an input is invalid, you should NOT write anything to output but return -1 instead.

Use your knowledge about RISC-V instruction formats and think carefully about how inputs could be invalid. You are encouraged to use venus as a resource. Do note that venus has more pseudoinstruction expansions than our assembler, which means that instructions with invalid arguments for our assembler could be treated as a pseduoinstruction by venus. Therefore, you should check the text section after assembling to make sure that the instruction has not been expanded by venus .

If a branch offset cannot fit inside the immediate field, you should treat it as an error.

Step 4: Pseudoinstruction Expansion

Implement write_pass_one() in src/translate.c, which should perform pseudoinstruction expansion on the load immediate (li), branch on equal to zero (beqz), move (mv), jump (j) and jump register (jr) instructions. The load immediate instruction normally gets expanded into an lui-addi pair. However, an optimization can be made when the immediate is small. If the immediate can fit inside the imm field of an addi instruction, we will use an addi instruction instead. Other assemblers may implement additional optimizations, but ours will not. For the mv instruction, use the fewest number of instructions possible. Also, make sure that your pseudoinstruction expansions do not produce any unintended side effects. You will also be performing some error checking on the pseudoinstructions (see src/translate.c for details). If there is an error, do NOT write anything to the intermediate file, and return 0 to indicate that 0 lines have been written.

Caution: Although jump and link and jump and link register are not pseudoinstructions themselves, the short-hand format of these two instructions are pseudoinstructions, i.e. jal label and jalr rs1. You should also expand them to the form of jal rd label and jalr rd rs1 imm.

Step 5: Putting It All Together

Implement pass_one() and pass_two() in assembler.c. In the first pass, the assembler will strip comments, add labels to the symbol table, perform pseudoinstruction expansion, and write assembly code into an intermediate file. The second pass will read the intermediate file, translate the instructions into machine code using the symbol table, and write it to an output file. Afterwards, the symbol table will be written to the output file as well, but that has been handled for you.

Before you begin, make sure you understand the documentation of fgets() and strtok(). It will be easier to implement pass_two() first. The comments in the function will give a more detailed outline of what to do, as well as what assumptions you may make. Your program should not exit if a line contains an error. Instead, keep track of whether any errors have occured, and if so, return -1 at the end. pass_one() should be structured similarly to pass_two(), except that you will also need to parse out comments and labels. You will find the skip_comment() and add_if_label() functions useful.

As an aside, our parser is much more lenient than an actual RISC-V parser. Building a good parser is outside the scope of this course, but we encourage you to learn about finite state automata if you are interested.

Line Numbers and Byte Offsets

When parsing, you will need to keep track of two numbers, the line number of the input file and the byte offset of the current instruction. Line numbers start at 1, and include whitespace. The byte offset refers to how far away the current instruction is from the first instruction, and does NOT include whitespace. You can think of the byte offset as where each instruction will be if the instructions were loaded into memory starting at address 0. See below for an example.

The address of a label is the byte offset of the next instruction. In the example below, L1 has an address of 4 (since the next instruction is lw, whose address is 4) and L2 has an address of 8 (since the next instruction is ori, whose address is 8).

Line # Input File
1     addi t0 a0 0
2 L1: lw t1 0(t0)
3 # This is a comment
4 L2:
5     ori t1 t1 0xABCD
6     addi t1 t1 3
8     bne t1 a2 L2

Output File Byte Offset
addi t0 a0 0 0
lw t1 0(t0) 4
ori t1 t1 0xABCD 8
addiu t1 t1 3 12
bne t1 a2 label_2 16

Error Handling

If an input file contains an error, we only require that your program print the correct error messages. The contents of your .int and .out files do not matter.

There are two kinds of errors you can get: errors with instructions and errors with labels. Error checking of labels is done for you by add_if_label(). However, you will still need to record that an error has occurred so that pass_one() can return -1.

In pass_one(), errors with instructions can be raised by 1) write_pass_one() or 2) the instruction having too many arguments. In pass_two(), errors with instructions will only be raised by translate_inst(). Both write_pass_one() and translate_inst() should return a special value (0 and -1 respectively) in the event of an error. You will need to detect whether an instuction has too many arguments yourself in pass_one().

Whenever an error is encountered in either pass_one() or pass_two(), record that there is an error and move on. Do not exit the function prematurely. When the function exits, return -1.

For information about testing error message, please see the "Error Message Testing" section under "Running the Assembler".

Step 6: Testing

You are responsible for testing your code. While we have provided a few test cases, they are by no means comprehensive. Fortunately, you have a variety of testing tools at your service.


You should use Valgrind to check whether your code has any memory leaks. We have included a file, run-valgrind, which will run Valgrind on any executable of your choosing. If you get a permission denied error, try changing adding the execute permission to the file:

chmod u+x run-valgrind

Then you can run by typing:

./run-valgrind <whatever program you want to run>

For example, you wanted to see whether running ./assembler -p1 input/simple.s out/ would cause any memory leaks, you should run ./run-valgrind ./assembler -p1 input/simple.s out/


Since you're writing an assembler, why not refer to an existing assembler? venus is a powerful reference for you to use, and you are encouraged to write your own RISC-V files and assemble them using venus.

Warning: in some cases the output of venus will differ from the specifications of this project. You should always follow the specs. This is because venus 1) supports more pseudoinstructions, 2) has slightly different pseudoinstruction expansion rules, and 3) acts as an assembler and linker. You should always examine the assembled instructions carefully when testing with venus.


diff is a utility for comparing the contents of files. Running the following command will print out the differences between file1 and file2:

diff <file1> <file2>

To see how to interpret diff results, click here. We have provided some sample input-output pairs (again, these are not comprehensive tests) located in the input and out/ref directories respectively. For example, to check the output of running simple.s on your assembler against the expected output, run:

./assembler input/simple.s out/ out/simple.out 
diff out/simple.out out/ref/simple_ref.out

Running the Assembler

First, make sure your assembler executable is up to date by running make.

By default, the assembler runs two passes. The first pass reads an input file and translates it into an intermediate file. The second pass reads the intermediate file and translates it into an output file. To run both passes, type:

./assembler <input file> <intermediate file> <output file>

Alternatively, you can run only a single pass, which may be helpful while debugging. To run only the first pass, use the -p1 flag:

./assembler <-p1> <input file> <intermediate file>

To run only the second pass, use the -p2 flag. Note that when running pass two only, your symbol table will be empty since labels were stripped in pass_one(), so it may affect your branch instructions.

./assembler <-p2> <intermediate file> <output file>

When testing cases that should produce error messages, you may want to use the -log flag to log error messages to a text file. The -log flag should be followed with the location of the output file (WARNING: old contents will be overwritten!), and it can be used with any of the three modes above.

Error Message Testing

We have provided two tests for error messages, one for errors that should be raised during pass_one(), and one for errors that should be raised during pass_two(). To test for pass_one() errors, assemble input/p1_errors.s with the -p1 flag and verify that your output matches the expected output:

./assembler -p1 input/p1_errors.s out/ -log log/p1_errors.txt
diff log/p1_errors.txt log/ref/p1_errors_ref.txt

To test for pass_two() errors, assemble input/p2_errors.s running both passes:

./assembler input/p2_errors.s out/ out/p2_errors.out -log log/p2_errors.txt
diff log/p2_errors.txt log/ref/p2_errors_ref.txt

Your intermediate and output files (.int and .out files) do NOT need to match the reference output if the input file contains an error.

Notes regarding grading

How much will I need to write

Here is a summary of the solution code. The final row gives total lines inserted and deleted; a changed line counts as both an insertion and a deletion. However, there are many possible solutions and many of them may differ.

      assembler.c               | 138 ++++++++++++++++++-----------
      src/tables.c              |  69 ++++++++++++++-
      src/translate.c           | 262 +++++++++++++++++++++++++++++++++++++++++++++-----------
      src/translate_utils.c     |  64 ++++++++++++--
      4 files changed, 416 insertions(+), 117 deletions(-)


You should submit an archive file names as framework.tar to Autolab. The archive must contain a folder named framework.

The directory tree of your submission should like the following:

    |--- src
    |     |-- tables.c     
    |     |-- tables.h
    |     |-- translate.c
    |     |-- translate.h
    |     |-- translate_utils.c
    |     |-- translate_utils.h
    |     |-- utils.c
    |     |-- utils.h
    |--- assembler.c
    |--- assembler.h
    |--- Makefile
    |--- run-valgrind

Autolab Results

tests 1-x stands for results for testcase x.

test 2-0 stands for the result for memory leak detection.